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19-0811; Rev 0; 4/07
KIT ATION EVALU E AILABL AV
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
General Description
The MAX15020 high-voltage step-down DC-DC converter operates over an input voltage range of 7.5V to 40V. The device integrates a 0.2 high-side switch and is capable of delivering 2A load current with excellent load and line regulation. The output is dynamically adjustable from 0.5V to 36V through the use of an external reference input (REFIN). The MAX15020 consumes only 6A in shutdown mode. The device utilizes feed-forward voltage-mode architecture for good noise immunity in the high-voltage switching environment and offers external compensation for maximum flexibility. The switching frequency is selectable to 300kHz or 500kHz and can be synchronized to an external clock signal of 100kHz to 500kHz by using the SYNC input. The IC features a maximum duty cycle of 95% (typ) at 300kHz. The device includes configurable undervoltage lockout (UVLO) and soft-start. Protection features include cycle-by-cycle current limit, hiccup-mode for output short-circuit protection, and thermal shutdown. The MAX15020 is available in a 20-pin TQFN 5mm x 5mm package and is rated for operation over the -40C to +125C temperature range.
Features
o Wide 7.5V to 40V Input Voltage Range o 2A Output Current, Up to 96% Efficiency o Dynamic Programmable Output Voltage (0.5V to 36V) o Maximum Duty Cycle of 95% (typ) at 300kHz o 100kHz to 500kHz Synchronizable SYNC Frequency Range o Configurable UVLO and Soft-Start o Low-Noise, Voltage-Mode Step-Down Converter o Programmable Output-Voltage Slew Rate o Lossless Constant Current Limit with Fixed Timeout to Hiccup Mode o Extremely Low-Power Consumption (< 6A typ) in Shutdown Mode o 20-Pin (5mm x 5mm) Thin QFN Package
MAX15020
Ordering Information
PART MAX15020ATP+ TEMP RANGE -40C to +125C PINPACKAGE 20 TQFN-EP* (5mm x 5mm) PKG CODE T2055-5
Applications
Printer Head Driver Power Supply Automotive Power Supply Industrial Power Supply Step-Down Power Supply
+Denotes a lead-free package. *EP = Exposed pad.
Pin Configuration appears at end of data sheet.
Typical Operating Circuit
VIN (7.5V TO 40V)
ON/OFF
IN
REG
DVREG
BST VOUT (0.5V TO 36V) LX
REFOUT
MAX15020
FB PWM INPUT REFIN EP SS SYNC GND FSEL PGND COMP
________________________________________________________________ Maxim Integrated Products
1
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
ABSOLUTE MAXIMUM RATINGS
IN, ON/OFF to GND............ ...................................-0.3V to +45V LX to GND................................................-0.715V to (VIN + 0.3V) BST to GND ..................................................-0.3V to (VIN + 12V) BST to LX................................................................-0.3V to +12V PGND, EP to GND .................................................-0.3V to +0.3V REG, DVREG, SYNC to GND .................................-0.3V to +12V FB, COMP, FSEL, REFIN, REFOUT, SS to GND .............................................-0.3V to (VREG + 0.3V) Continuous Current through Internal Power MOSFET TJ = +125C..........................................................................4A TJ = +150C.......................................................................2.7A Continuous Power Dissipation (TA = +70C) 20-Pin Thin QFN, single-layer board (5mm x 5mm) (derate 21.3mW/C above +70C) ...........................1702.1mW 20-Pin Thin QFN, multilayer board (5mm x 5mm) (derate 34.5mW/C above +70C) ...........................2758.6mW Maximum Junction Temperature .....................................+150C Storage Temperature Range ............................-60C to +150C Lead Temperature (soldering, 10s) ................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = 36V, VREG = VDVREG, VPGND = VGND = VEP = 0V, VSYNC = 0V, CREFOUT = 0.1F, TA = TJ = -40C to +125C, FSEL = REG, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Input Voltage Range UVLO Rising Threshold UVLO Falling Threshold UVLO Hysteresis Quiescent Supply Current Switching Supply Current Shutdown Current ON/OFF CONTROL Input-Voltage Threshold Input-Voltage Threshold Hysteresis Input Bias Current Shutdown Threshold Voltage Output Voltage OSCILLATOR Frequency Maximum Duty Cycle SYNC/FSEL High-Level Voltage SYNC/FSEL Low-Level Voltage SYNC Frequency Range fSYNC VFSEL = VREG 100 fSW DMAX VFSEL = 0V VFSEL = VREG VFSEL = 0V VFSEL = VREG 450 270 85 90 2 0.8 550 550 330 kHz % V V kHz VSD IREG = 0 to 20mA 7.1 INTERNAL VOLTAGE REGULATOR (REG) 8.3 V VON/OFF = 0V to VIN -250 VON/OFF VON/OFF rising 1.200 1.225 120 +250 0.2 1.270 V mV nA V ISHDN SYMBOL VIN UVLORISING UVLOFALLING UVLOHYST VIN = 40V, VFB = 1.3V VIN = 40V, VFB = 0V VON/OFF = 0.2V, VIN = 40V CONDITIONS MIN 7.5 6.80 6.0 7.20 6.5 0.7 1.6 14.5 6 15 2.8 TYP MAX 40.0 7.45 7.0 UNITS V V V V mA mA A
2
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 36V, VREG = VDVREG, VPGND = VGND = VEP = 0V, VSYNC = 0V, CREFOUT = 0.1F, TA = TJ = -40C to +125C, FSEL = REG, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER SOFT-START/REFIN/REFOUT/FB Soft-Start Current REFOUT Output Voltage REFIN Input Range REFIN = REFOUT FB Accuracy FB Input Current Open-Loop Gain Unity-Gain Bandwidth PWM Modulator Gain (VIN / VRAMP) CURRENT-LIMIT COMPARATOR Cycle-by-Cycle Switch Current Limit Number of ILIM Events to Hiccup Hiccup Timeout POWER SWITCH Switch On-Resistance BST Leakage Current Switch Leakage Current Switch Gate Charge THERMAL SHUTDOWN Thermal Shutdown Temperature Thermal Shutdown Hysteresis TSHDN +160 20 C C VBST - VLX = 6V VBST = VLX = VIN = 40V VIN = 40V, VLX = VBST = 0V VBST - VLX = 6V 10 0.18 0.35 10 10 A A nC IILIM 2.5 3.5 4 512 4.5 A
--
MAX15020
SYMBOL ISS
CONDITIONS
MIN 8 0.97 0 0.97 VREFIN - 5mV -250
TYP 15 0.98 0.98 VREFIN
MAX 26 1.01 3.6 1.01 VREFIN + 5mV +250
UNITS A V V V mV nA dB MHz V/V
FB = COMP, VREFIN = 0.2V to 3.6V VSS = 0.2V, VFB = 0V
80 1.8 fSYNC = 100kHz, VIN = 7.5V fSYNC = 500kHz, VIN = 40V 9.4 8.9
Clock periods
Note 1: Limits are 100% production tested at TA = TJ = +25C. Limits at -40C and +125C are guaranteed by design.
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
Typical Operating Characteristics
(VIN = 36V, Circuit of Figure 2, TA = +25C, unless otherwise noted.)
UNDERVOLTAGE LOCKOUT HYSTERESIS vs. TEMPERATURE
MAX15020 toc01
ON/OFF THRESHOLD HYSTERESIS vs. TEMPERATURE
MAX15020 toc02
SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE
MAX15020 toc03
1.0 UNDERVOLTAGE LOCKOUT HYSTERESIS 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 -15 10 35 60 85 110
0.20 ON/OFF THRESHOLD HYSTERESIS (V)
7 6 SUPPLY CURRENT (A) 5 4 3 2 1
0.15
0.10
0.05
0 135 -40 -15 10 35 60 85 110 135 TEMPERATURE (C) TEMPERATURE (C)
0 0 10 20 INPUT VOLTAGE (V) 30 40
NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE
MAX15020 toc04
OPERATING FREQUENCY vs. TEMPERATURE
MAX15020 toc05
MAXIMUM DUTY CYCLE vs. INPUT VOLTAGE
98 96 DUTY CYCLE (%) 94 92 90 88 86 84 82 80
MAX15020 toc06
16 14 SUPPLY CURRENT (mA) 12 10 8 6 4 2 0 0 10 20 INPUT VOLTAGE (V) 30
308 306 OPERATING FREQUENCY (kHz) 304 302 300 298 296 294 292 290 288
100
40
-40
-15
10
35
60
85
110
135
0
10
20 INPUT VOLTAGE (V)
30
40
TEMPERATURE (C)
LOOP GAIN/PHASE vs. FREQUENCY
50 40 30 20 GAIN (dB) 10 0 -10 -20 -30 -40 -50 VIN = 37V, VOUT = 15V, IOUT = 2.02A 0.1 1 10 FREQUENCY (kHz) 100 GAIN PHASE
MAX15020 toc07
MAXIMUM LOAD CURRENT vs. INPUT VOLTAGE
144 108 LOAD CURRENT (A) PHASE (DEGREES) 72 36 0 -36 -72 -108 -144 -180 1000 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 2.5 0 5 10 15 20 25 30 35 40 INPUT VOLTAGE (V) TA = +85C TA = +25C TA = -45C
MAX15020 toc08
180
3.5
4
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
Typical Operating Characteristics (continued)
(VIN = 36V, Circuit of Figure 2, TA = +25C, unless otherwise noted.)
MAX15020
TURN-ON/TURN-OFF WAVEFORM
MAX15020 toc09
TURN-ON/TURN-OFF WAVEFORM
MAX15020 toc10
REFOUT VOLTAGE vs. TEMPERATURE
MAX15020 toc11
1.05 5V/div REFOUT VOLTAGE (V)
5V/div VON/OFF 0V VON/OFF
0V
1.03
1.01
0.99
VOUT 1V/div 0V VIN = 12V, RLOAD = 27 10ms/div
VOUT 1V/div
0.97 0V VIN = 40V, RLOAD = 27 10ms/div 0.95 -40 -15 10 35 60 85 110 135 TEMPERATURE (C)
EFFICIENCY vs. LOAD CURRENT
MAX15020 toc12
EFFICIENCY vs. LOAD CURRENT
90 80 EFFICIENCY (%) 70 60 50 40 30 20
MAX15020 toc13
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.01 0.1 1 VIN = 40V fS = 500kHz VOUT = 3.3V VIN = 24V VIN = 7.5V VIN = 12V
100
10 0 10 0.01 0.1 1
fS = 500kHz VIN = 40V VOUT = 30V 10
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
LOAD TRANSIENT
MAX15020 toc14
LOAD TRANSIENT
MAX15020 toc15
VOUT
50mV/div AC-COUPLED
IOUT
50mV/div AC-COUPLED
2A IOUT 1A VOUT 1.2A 0.2A VIN = 12V, VOUT = 3.3V 200s/div VIN = 12V, VOUT = 3.3V 200s/div
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
Typical Operating Characteristics (continued)
(VIN = 36V, Circuit of Figure 2, TA = +25C, unless otherwise noted.)
LOAD TRANSIENT
MAX15020 toc16
LOAD TRANSIENT
MAX15020 toc17
VOUT
50mV/div AC-COUPLED 2A
VOUT
50mV/div AC-COUPLED
IOUT
1A
1.1A IOUT 0.25A
VIN = 40V, VOUT = 30V 200s/div
VIN = 40V, VOUT = 30V 200s/div
LIGHT-LOAD SWITCHING WAVEFORMS
MAX15020 toc18
SWITCHING WAVEFORMS
MAX15020 toc19
VLX
20V/div 0V
VLX
20V/div 0V
ILX ILOAD = 40mA 1s/div
1A/div 0A
ILX ILOAD = 500mA 1s/div
1A/div 0A
HEAVY-LOAD SWITCHING WAVEFORMS
MAX15020 toc20
FEEDBACK VOLTAGE vs. REFIN INPUT VOLTAGE
3.5 FEEDBACK VOLTAGE (V) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 1 2 3 4
MAX15020 toc21
4.0
VLX
20V/div 0V
ILX
1A/div
0A ILOAD = 2A 1s/div
REFIN INPUT VOLTAGE (V)
6
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
Typical Operating Characteristics (continued)
(VIN = 36V, Circuit of Figure 2, TA = +25C, unless otherwise noted.)
MAX15020
SOFT-START VOLTAGE RISE vs. REFIN VOLTAGE RISE
MAX15020 toc22
VSS AND VOUT RESPONSE TO REFIN PWM
MAX15020 toc23
10
VOUT
20V/div 0V
CSS = 0.1F VSS dv/dt (V/ms) 1
VSS
1V 0.5V
0.1 CSS = 0.01F
VREFIN
1V/div 10k and 0.1F RC ON REFIN 0V
VPWM 0.01 0.01 0.1 1 10
D = 70% TO 100% 2ms/div
1V/div 0V
VREFIN dv/dt (V/ms)
MODULATOR GAIN vs. INPUT VOLTAGE
MAX15020 toc24
SOFT-START CHARGE CURRENT vs. TEMPERATURE
SOFT-START CHARGE CURRENT (A) 15.4 15.3 15.2 15.1 15.0 14.9 14.8 14.7 14.6
MAX15020 toc25
11.0 10.5 MODULATOR GAIN (V/V) 10.0 9.5 9.0 8.5 8.0 5 10 15 20 25 30 35
15.5
14.5 40 -40 -15 10 35 60 85 110 135 INPUT VOLTAGE (V) TEMPERATURE (C)
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
Pin Description
PIN 1 2 NAME COMP FB FUNCTION Voltage-Error-Amplifier Output. Connect COMP to the necessary compensation feedback network. Feedback Regulation Point. Connect to the center tap of an external resistor-divider connected between the output and GND to set the output voltage. The FB voltage regulates to the voltage applied to REFIN. ON/OFF Control. The ON/OFF rising threshold is set to approximately 1.225V. Connect to the center tap of a resistive divider connected between IN and GND to set the turn-on (rising) threshold. Connect ON/OFF to GND to shut down the IC. Connect ON/OFF to IN for always-on operation given that VIN has risen above the UVLO threshold. ON/OFF can be used for power-supply sequencing. 0.98V Reference Voltage Output. Bypass REFOUT to GND with a 0.1F ceramic capacitor. REFOUT is to be used only with REFIN. It is not to be used to power any other external circuitry. Soft-Start. Connect a 0.01F or greater ceramic capacitor from SS to GND. See the Soft-Start (SS) section. External Reference Input. Connect to an external reference. VFB regulates to the voltage applied to REFIN. Connect REFIN to REFOUT to use the internal 1V reference. See the Reference Input and Output (REFIN, REOUT) section. Internal Switching Frequency Selection Input. Connect FSEL to REG to select fSW = 300kHz. Connect FSEL to GND to select fSW = 500kHz. When an external clock is connected to SYNC connect FSEL to REG. Oscillator Synchronization Input. SYNC can be driven by an external 100kHz to 500kHz clock to synchronize the MAX15020's switching frequency. Connect SYNC to GND to disable the synchronization function. When using SYNC, connect FSEL to REG. Power Supply for Internal Digital Circuitry. Connect a 10 resistor from REG to DVREG. Connect DVREG to the anode of the boost diode, D2 in Figure 2. Bypass DVREG to GND with at least a 1F ceramic capacitor. Power-Ground Connection. Connect the input filter capacitor's negative terminal, the anode of the freewheeling diode, and the output filter capacitor's return to PGND. Connect externally to GND at a single point near the input bypass capacitor's return terminal. No Connection. Leave unconnected or connect to GND High-Side Gate Driver Supply. Connect BST to the cathode of the boost diode and to the positive terminal of the boost capacitor. Source Connection of Internal High-Side Switch. Connect the inductor and rectifier diode's cathode to LX. Supply Input Connection. Connect to an external voltage source from 7.5V to 40V. 8V Internal Regulator Output. Bypass to GND with at least a 1F ceramic capacitor. Do not use REG to power external circuitry. Ground Connection. Solder the exposed pad to a large GND plane. Connect GND and PGND together at one point near the input bypass capacitor return terminal. Exposed Pad. Connect EP to GND. Connecting EP does not remove the requirement for proper ground connections to the appropriate pins. See the PCB Layout and Routing section.
3
ON/OFF
4 5 6
REFOUT SS REFIN
7
FSEL
8
SYNC
9
DVREG
10 11 12 13, 14, 15 16, 17, 18 19 20 --
PGND N.C. BST LX IN REG GND EP
8
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
ON/OFF
IN LDO REG EN REF REF
MAX15020
REFOUT
REF
REF
THERMAL SHDN
VPOK
OK
ENABLE SWITCHING ICSS REGOK IN
SSA REFIN
OVERLOAD MANAGEMENT
CLK ILIM
HIGH-SIDE CURRENT SENSE REF_ILIM
SS E/A FB COMP LOGIC LX IN EN SYNC RAMP OSC PGND CPWM DVREG BST
FSEL
CLK
GND
Figure 1. Functional Diagram
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
VIN 7.5V TO 40V C3 0.1F C1 560F D2 R1 97.5k ON/OFF DVREG R2 4.02k C10 1F R5 10 REG R3 10k C2 1F REFIN C9 0.1F SS 0 C8 0.22F C5 0.1F COMP REFOUT SYNC GND FSEL PGND EP C12 0.1F R9 15.8k FB C13 330pF R8 340 IN BST LX D1 R6 10k C11 0.027F R7 10k C7 0.1F C6 560F C4 1F
L1 22H
VOUT
MAX15020
PWM INPUT
Figure 2. Typical Application Circuit
Detailed Description
The MAX15020 voltage-mode step-down converter contains an internal 0.2 power MOSFET switch. The MAX15020 input voltage range is 7.5V to 40V. The internal low RDS(ON) switch allows for up to 2A of output current. The external compensation, voltage feedforward, and automatically adjustable maximum ramp amplitude simplify the loop compensation design allowing for a variety of L and C filter components. In shutdown, the supply current is typically 6A. The output voltage is dynamically adjustable from 0.5V to 36V. Additional features include an externally programmable UVLO through the ON/OFF pin, a programmable softstart, cycle-by-cycle current limit, hiccup-mode output short-circuit protection, and thermal shutdown.
tion, REG is intended for powering up only the internal circuitry and should not be used to supply power to the external loads.
UVLO/ON/OFF Threshold
The MAX15020 provides a fixed 7V UVLO function which monitors the input voltage (VIN). The device is held off until VIN rises above the UVLO threshold. ON/OFF provides additional turn-on/turn-off control. Program the ON/OFF threshold by connecting a resistive divider from IN to ON/OFF to GND. The device turns on when VON/OFF rises above the ON/OFF threshold (1.225V), given that VIN has risen above the UVLO threshold. Driving ON/OFF to ground places the IC in shutdown. When in shutdown the internal power MOSFET turns off, all internal circuitry shuts down, and the quiescent supply current reduces to 6A (typ.). Connect an RC network from ON/OFF to GND to set a turn-on delay that can be used to sequence the output voltages of multiple devices.
Internal Linear Regulator (REG)
REG is the output terminal of the 8V LDO powered from IN and provides power to the IC. Connect REG externally to DVREG to provide power for the internal digital circuitry. Place a 1F ceramic bypass capacitor, C2, next to the IC from REG to GND. During normal opera10
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
Soft-Start (SS)
At startup, after VIN is applied and the UVLO threshold is reached, a 15A (typ) current is sourced into the capacitor (CSS) connected from SS to GND forcing the VSS voltage to ramp up slowly. If VREFIN is set to a DC voltage or has risen faster than the CSS charge rate, then V SS will stop rising once it reaches V REFIN . If VREFIN rises at a slower rate, VSS will follow the VREFIN voltage rise rate. VOUT rises at the same rate as VSS since VFB follows VSS. Set the soft-start time (tSS) using following equation: V x CSS t SS = REFIN 15A where tSS is in seconds and CSS is in Farads. 500kHz based upon the selection of FSEL. For external synchronization, drive SYNC with an external clock from 100kHz to 500kHz and connect FSEL to REG. When driven with an external clock, the device synchronizes to the rising edge of SYNC.
MAX15020
PWM Comparator/Voltage Feed-Forward
An internal ramp generator is compared against the output of the error amplifier to generate the PWM signal. The maximum amplitude of the ramp (VRAMP) automatically adjusts to compensate for input voltage and oscillator frequency changes. This causes the VIN / VRAMP to be a constant 9V/V across the input voltage range of 7.5V to 40V and the SYNC frequency range of 100kHz to 500kHz. This simplifies loop compensation design by allowing large input voltage ranges and large frequency range selection.
Reference Input and Output (REFIN, REFOUT)
The MAX15020 features a reference input for the internal error amplifier. The IC regulates FB to the SS voltage which is driven by the DC voltage applied to REFIN. Connect REFIN to REFOUT to use the internal 0.98V reference. Connect REFIN to a variable DC voltage source to dynamically control the output voltage. Alternatively, REFIN can also be driven by a duty-cycle control PWM source through a lowpass RC filter (Figure 2).
Output Short-Circuit Protection (Hiccup Mode)
The MAX15020 protects against an output short circuit by utilizing hiccup-mode protection. In hiccup mode, a series of sequential cycle-by-cycle current-limit events cause the part to shut down and restart with a soft-start sequence. This allows the device to operate with a continuous output short circuit. During normal operation, the switch current is measured cycle-by-cycle. When the current limit is exceeded, the internal power MOSFET turns off until the next on-cycle and the hiccup counter increments. If the counter counts four consecutive overcurrent limit events, the device discharges the soft-start capacitor and shuts down for 512 clock periods before restarting with a softstart sequence. Each time the power MOSFET turns on and the device does not exceed the current limit, the counter is reset.
Internal Digital Power Supply (DVREG)
DVREG is the supply input for the internal digital power supply. The power for DVREG is derived from the output of the internal regulator (REG). Connect a 10 resistor from REG to DVREG. Bypass DVREG to GND with at least a 1F ceramic capacitor.
Error Amplifier
The output of the internal error amplifier (COMP) is available for frequency compensation (see the Compensation Design section). The inverting input is FB, the noninverting input is SS, and the output is COMP. The error amplifier has an 80dB open-loop gain and a 1.8MHz GBW product. When an external clock is used, connect FSEL to REG.
Thermal-Overload Protection
The MAX15020 features an integrated thermal-overload protection. Thermal-overload protection limits the total power dissipation in the device and protects it in the event of an extended thermal fault condition. When the die temperature exceeds +160C, an internal thermal sensor shuts down the part, turning off the power MOSFET and allowing the IC to cool. After the temperature falls by 20C, the part restarts beginning with the soft-start sequence.
Oscillator/Synchronization Input (SYNC)
With SYNC connected to GND, the IC uses the internal oscillator and switches at a fixed frequency of 300kHz or
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11
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
Applications Information
Setting the ON/OFF Threshold
When the voltage at ON/OFF rises above 1.225V, the MAX15020 turns on. Connect a resistive divider from IN to ON/OFF to GND to set the turn-on voltage (see Figure 2). First select the ON/OFF to the GND resistor (R2), then calculate the resistor from IN to ON/OFF (R1) using the following equation: VIN R1 = R2 x - 1 VON / OFF where VIN is the input voltage at which the converter turns on, VON/OFF = 1.225V and R2 is chosen to be less than 600k. If ON/OFF is connected to IN directly, the UVLO feature monitors the supply voltage at IN and allows operation to start when VIN rises above 7.2V. The output-voltage falling slew rate is limited to the discharge rate of CSS assuming there is enough load current to discharge the output capacitor at this rate. The CSS discharge current is 15A. If there is no load, then the output voltage falls at a slower rate based upon leakage and additional current drain from COUT.
Inductor Selection
Three key inductor parameters must be specified for operation with the MAX15020: inductance value (L), peak inductor current (IPEAK), and inductor saturation current (ISAT). The minimum required inductance is a function of operating frequency, input-to-output voltage differential, and the peak-to-peak inductor current (IL). Higher IL allows for a lower inductor value while a lower IL requires a higher inductor value. A lower inductor value minimizes size and cost and improves large-signal and transient response, but reduces efficiency due to higher peak currents and higher peak-topeak output voltage ripple for the same output capacitor. Higher inductance increases efficiency by reducing the ripple current. Resistive losses due to extra wire turns can exceed the benefit gained from lower ripple current levels especially when the inductance is increased without also allowing for larger inductor dimensions. A good compromise is to choose IP-P equal to 40% of the full load current. Calculate the inductor using the following equation: L= (VIN - VOUT ) x VOUT VIN x fSW x IL
Setting the Output Voltage
Connect a resistor-divider from OUT to FB to GND to set the output voltage (see Figure 2). First calculate the resistor (R7) from OUT to FB using the guidelines in the Compensation Design section. Once R7 is known, calculate R8 using the following equation: R8 = R7 VOUT - 1 VFB
where VFB = REFIN and REFIN = 0 to 3.6V.
Setting the Output-Voltage Slew Rate
The output-voltage rising slew rate tracks the VSS slew rate, given that the control loop is relatively fast compared with the V SS slew rate. The maximum V SS upswing slew rate is controlled by the soft-start current charging the capacitor connected from SS to GND according to the formula below: dVOUT R7 + R8 dVSS R7 + R8 ISS = x = dt R8 dt R8 CSS when driving VSS with a slow-rising voltage source at REFIN, VOUT will slowly rise according to the VREFIN slew rate.
VIN and VOUT are typical values so that efficiency is optimum for typical conditions. The switching frequency (fSW) is fixed at 300kHz or 500kHz and can vary between 100kHz and 500kHz when synchronized to an external clock (see the Oscillator/Synchronization Input (SYNC) section). The peak-to-peak inductor current, which reflects the peak-to-peak output ripple, is worst at the maximum input voltage. See the Output Capacitor Selection section to verify that the worst-case output ripple is acceptable. The inductor saturating current (ISAT) is also important to avoid runaway current during continuous output short circuit. Select an inductor with an ISAT specification higher than the maximum peak current limit of 4.5A.
12
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2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
Input Capacitor Selection
The discontinuous input current of the buck converter causes large input ripple currents and therefore the input capacitor must be carefully chosen to keep the input-voltage ripple within design requirements. The input-voltage ripple is comprised of VQ (caused by the capacitor discharge) and VESR (caused by the ESR (equivalent series resistance) of the input capacitor). The total voltage ripple is the sum of VQ and VESR. Calculate the input capacitance and ESR required for a specified ripple using the following equations: ESR = VESR IL IOUT _ MAX + 2 IOUT _ MAX x D(1 - D) VQ x fSW
MAX15020
IL 16 x COUT x fSW VESR = ESR x IL VQ = Normally, a good approximation of the output-voltage ripple is VRIPPLE VESR + VQ. If using ceramic capacitors, assume the contribution to the output-voltage ripple from ESR and the capacitor discharge to be equal to 20% and 80%, respectively. IL is the peak-topeak inductor current (see the Input Capacitor Selection section) and fSW is the converter's switching frequency. The allowable deviation of the output voltage during fast load transients also determines the output capacitance, its ESR, and its equivalent series inductance (ESL). The output capacitor supplies the load current during a load step until the controller responds with a greater duty cycle. The response time (t RESPONSE) depends on the closed-loop bandwidth of the converter (see the Compensation Design section). The resistive drop across the output capacitor's ESR, the drop across the capacitor's ESL (VESL), and the capacitor discharge cause a voltage droop during the load step. Use a combination of low-ESR tantalum/aluminum electrolytic and ceramic capacitors for better transient load and voltage ripple performance. Surface-mount capacitors and capacitors in parallel help reduce the ESL. Keep the maximum output-voltage deviations below the tolerable limits of the electronics powered. Use the following equations to calculate the required ESR, ESL, and capacitance value during a load step: V ESR = ESR ISTEP xt I COUT = STEP RESPONSE VQ ESL = VESL x t STEP ISTEP
CIN = where: IL =
(VIN - VOUT ) x VOUT VIN x fSW x L
V D = OUT VIN IOUT_MAX is the maximum output current, D is the duty cycle, and fSW is the switching frequency. The MAX15020 includes internal and external UVLO hysteresis and soft-start to avoid possible unintentional chattering during turn-on. However, use a bulk capacitor if the input source impedance is high. Use enough input capacitance at lower input voltages to avoid possible undershoot below the UVLO threshold during transient loading.
Output Capacitor Selection
The allowable output-voltage ripple and the maximum deviation of the output voltage during load steps determine the output capacitance and its ESR. The output ripple is mainly composed of V Q (caused by the capacitor discharge) and VESR (caused by the voltage drop across the ESR of the output capacitor). The equations for calculating the peak-to-peak output voltage ripple are:
where ISTEP is the load step, tSTEP is the rise time of the load step, and tRESPONSE is the response time of the controller.
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13
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
Compensation Design
The MAX15020 uses a voltage-mode control scheme that regulates the output voltage by comparing the error-amplifier output (COMP) with an internal ramp to produce the required duty cycle. The output lowpass LC filter creates a double pole at the resonant frequency, which has a gain drop of -40dB/decade. The error amplifier must compensate for this gain drop and phase shift to achieve a stable closed-loop system. The basic regulator loop consists of a power modulator, an output feedback divider, and a voltage error amplifier. The power modulator has a DC gain set by VIN / VRAMP, with a double pole and a single zero set by the output inductance (L), the output capacitance (COUT) (C6 in the Figure 2) and its ESR. The power modulator incorporates a voltage feed-forward feature, which automatically adjusts for variations in the input voltage resulting in a DC gain of 9. The following equations define the power modulator: GMOD(DC) = fLC = 1 2 L x C 1 2 x COUT x ESR VIN VRAMP =9
Compensation when fC < fESR Figure 3 shows the error-amplifier feedback as well as its gain response for circuits that use low-ESR output capacitors (ceramic). In this case fZESR occurs after fC. fZ1 is set to 0.8 x fLC(MOD) and fZ2 is set to fLC to compensate for the gain and phase loss due to the double pole. Choose the inductor (L) and output capacitor (C OUT ) as described in the Inductor Selection and Output Capacitor Selection sections. Choose a value for the feedback resistor R6 in Figure 3 (values between 1k and 10k are adequate). C12 is then calculated as:
C12 = 1 2 x 0.8 x fLC x R9
fC occurs between fZ2 and fP2. The error-amplifier gain (GEA) at fC is due primarily to C11 and R9. Therefore, GEA(fC) = 2 x fC x C11 x R9 and the modulator gain at fC is: GMOD(fC) = GMOD(DC) (2) x L x COUT x fC2
2
fESR =
Since GEA(fC) x GMOD(fC) = 1, C11 is calculated by: f x L x COUT x 2 C11 = C R9 x GMOD(DC) fP2 is set at 1/2 the switching frequency (fSW). R6 is then calculated by: R6 = 1 2 x C11 x 0.5 x fSW
The switching frequency is internally set at 300kHz or 500kHz, or can vary from 100kHz to 500kHz when driven with an external SYNC signal. The crossover frequency (fC), which is the frequency when the closed-loop gain is equal to unity, should be set as fSW / 2 or lower. The error amplifier must provide a gain and phase bump to compensate for the rapid gain and phase loss from the LC double pole. This is accomplished by utilizing a Type 3 compensator that introduces two zeros and three poles into the control loop. The error amplifier has a low-frequency pole (fP1) near the origin. In reference to Figures 3 and 4, the two zeros are at: fZ1 = 1 1 and fZ2 = 2 x R9 x C12 2 x (R6 + R7) x C11
Since R7 >> R6, R7 + R6 can be approximated as R7. R7 is then calculated as: R7 = 1 2 x fLC x C11
fP3 is set at 5 x fC. Therefore, C13 is calculated as: C13 = C12 2 x C12 x R9 x fP3 - 1
And the higher frequency poles are at: 1 1 fP2 = and fP3 = 2 x R6 x C11 C12 x C13 2 x R9 x C12 + C13
14
______________________________________________________________________________________
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
C13 C13 R9 R6 C12 VOUT R7 FB R8 SS ERROR AMPLIFIER VOUT COMP R7 FB R8 SS ERROR AMPLIFIER COMP C11 R6 C12
C11
R9
CLOSED-LOOP GAIN GAIN (dB) ERRORAMPLIFIER GAIN GAIN (dB)
CLOSED-LOOP GAIN ERRORAMPLIFIER GAIN
fZ1
fZ2
fC
fP2
fP3
FREQUENCY (Hz)
fZ1
fZ2
fP2
fC
fP3 FREQUENCY (Hz)
Figure 3. Error-Amplifier Compensation Circuit (Closed-Loop and Error-Amplifier Gain Plot) for Ceramic Capacitors
Figure 4. Error-Amplifier Compensation Circuit (Closed-Loop and Error-Amplifier Gain Plot) for Higher ESR Output Capacitors
Compensation when fC > fZESR For larger ESR capacitors such as tantalum and aluminum electrolytics, fZESR can occur before fC. If fZESR < fC, then fC occurs between fP2 and fP3. fZ1 and fZ2 remain the same as before, however, fP2 is now set equal to fZESR. The output capacitor's ESR zero frequency is higher than fLC but lower than the closedloop crossover frequency. The equations that define the error amplifier's poles and zeros (fZ1, fZ2, fP1, fP2, and fP3) are the same as before. However, fP2 is now lower than the closed-loop crossover frequency. Figure 4 shows the error-amplifier feedback as well as its gain response for circuits that use higher-ESR output capacitors (tantalum or aluminum electrolytic).
Pick a value for the feedback resistor R9 in Figure 4 (values between 1k and 10k are adequate). C12 is then calculated as: 1 C12 = 2 x 0.8 x fLC x R9 The error-amplifier gain between fP2 and fP3 is approximately equal to R9 / R6 (given that R6 << R7). R6 can then be calculated as:
R6 =
R9 x 10 x fLC2 fC2
C11 is then calculated as: C x ESR C11 = OUT R6 Since R7 >> R6, R7 + R6 can be approximated as R7. R7 is then calculated as: R7 = 1 2 x fLC x C11
fP3 is set at 5 x fC. Therefore, C13 is calculated as: C13 = C12 2 x C12 x R9 x fP3 - 1
Based on the calculations above, the following compensation values are recommended when the switching frequency of DC-DC converter ranges from 100kHz to 500kHz. (Note: The compensation parameters in Figure 2 are strongly recommended if the switching frequency is from 300kHz to 500kHz.)
15
______________________________________________________________________________________
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
Power Dissipation
The MAX15020 is available in a thermally enhanced package and can dissipate up to 2.7W at TA = +70C. When the die temperature reaches +160C, the part shuts down and is allowed to cool. After the parts cool by 20C, the device restarts with a soft-start. The power dissipated in the device is the sum of the power dissipated from supply current (PQ), transition losses due to switching the internal power MOSFET (PSW), and the power dissipated due to the RMS current through the internal power MOSFET (PMOSFET). The total power dissipated in the package must be limited such that the junction temperature does not exceed its absolute maximum rating of +150C at maximum ambient temperature. Calculate the power lost in the MAX15020 using the following equations: The power loss through the switch: PMOSFET = IRMS _ MOSFET 2 x RON IRMS _ MOSFET = The power loss due to the switching supply current (ISW): PQ = VIN x ISW The total power dissipated in the device is: PTOTAL = PMOSFET + PSW + PQ
PCB Layout and Routing
Use the following guidelines to layout the switching voltage regulator: 1) Place the IN and DVREG bypass capacitors close to the MAX15020 PGND pin. Place the REG bypass capacitor close to the GND pin. Minimize the area and length of the high-current loops from the input capacitor, switching MOSFET, inductor, and output capacitor back to the input capacitor negative terminal. Keep short the current loop formed by the switching MOSFET, Schottky diode, and input capacitor. Keep GND and PGND isolated and connect them at one single point close to the negative terminal of the input filter capacitor. Place the bank of output capacitors close to the load. Distribute the power components evenly across the board for proper heat dissipation. Provide enough copper area at and around the MAX15020 and the inductor to aid in thermal dissipation. Use 2oz copper to keep the trace inductance and resistance to a minimum. Thin copper PCBs can compromise efficiency since high currents are involved in the application. Also, thicker copper conducts heat more effectively, thereby reducing thermal impedance. Place enough vias in the pad for the EP of the MAX15020 so that the heat generated inside can be effectively dissipated by PCB copper.
2)
3)
I IPK + = IOUT + L 2 IL IPK - = IOUT - 2
[I
D 2 PK + + IPK + x IPK - + IPK - x
(
)
]
4)
3
5) 6) 7)
RON is the on-resistance of the internal power MOSFET (see the Electrical Characteristics table). The power loss due to switching the internal MOSFET: V xI x (tR x tF ) x fSW PSW = IN OUT 4 where tR and tF are the rise and fall times of the internal power MOSFET measured at LX.
8)
9)
16
______________________________________________________________________________________
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
Pin Configuration
PROCESS: BiCMOS
N.C. BST
Chip Information
MAX15020
TOP VIEW
LX 15 14 LX 13 LX
12
11
IN 16 IN 17 IN 18 REG 19 GND 20
10 9
PGND DVREG SYNC FSEL REFIN
MAX15020
8 7
+
1 COMP 2 FB 3 ON/OFF 4 REFOUT 5 SS
6
THIN QFN (5mm x 5mm)
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17
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming MAX15020
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
1
2
18
______________________________________________________________________________________
QFN THIN.EPS
2A, 40V Step-Down DC-DC Converter with Dynamic Output-Voltage Programming
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX15020
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19
(c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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